diff options
Diffstat (limited to 'yjit/src/backend/arm64/mod.rs')
| -rw-r--r-- | yjit/src/backend/arm64/mod.rs | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs index e0e889c16c..9dc49a7686 100644 --- a/yjit/src/backend/arm64/mod.rs +++ b/yjit/src/backend/arm64/mod.rs @@ -175,7 +175,7 @@ impl Assembler } } }, - Op::And => { + Op::And | Op::Or => { match (opnds[0], opnds[1]) { (Opnd::Reg(_), Opnd::Reg(_)) => { asm.and(opnds[0], opnds[1]); @@ -567,6 +567,9 @@ impl Assembler Op::And => { and(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into()); }, + Op::Or => { + orr(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into()); + }, Op::Not => { mvn(cb, insn.out.into(), insn.opnds[0].into()); }, @@ -887,6 +890,15 @@ mod tests { } #[test] + fn test_emit_or() { + let (mut asm, mut cb) = setup_asm(); + + let opnd = asm.or(Opnd::Reg(X0_REG), Opnd::Reg(X1_REG)); + asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd); + asm.compile_with_num_regs(&mut cb, 1); + } + + #[test] fn test_emit_test() { let (mut asm, mut cb) = setup_asm(); |