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-rw-r--r--zjit/src/backend/arm64/mod.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/zjit/src/backend/arm64/mod.rs b/zjit/src/backend/arm64/mod.rs
index 2025e444ae..e99f52cdb3 100644
--- a/zjit/src/backend/arm64/mod.rs
+++ b/zjit/src/backend/arm64/mod.rs
@@ -200,10 +200,10 @@ impl Assembler
/// Avoid using if you can since this is used to lower [Insn] internally and
/// so conflicts are possible.
pub const SCRATCH_REG: Reg = X16_REG;
- const SCRATCH0: A64Opnd = A64Opnd::Reg(Assembler::SCRATCH_REG);
- const SCRATCH0_REG: Reg = Assembler::SCRATCH_REG;
- const SCRATCH1: A64Opnd = A64Opnd::Reg(X17_REG);
+ const SCRATCH0_REG: Reg = Self::SCRATCH_REG;
const SCRATCH1_REG: Reg = X17_REG;
+ const SCRATCH0: A64Opnd = A64Opnd::Reg(Self::SCRATCH0_REG);
+ const SCRATCH1: A64Opnd = A64Opnd::Reg(Self::SCRATCH1_REG);
/// Get the list of registers from which we will allocate on this platform
pub fn get_alloc_regs() -> Vec<Reg> {