YJIT: Avoid a register spill on arm64 (#9014)

2 files changed, 8 insertions, 1 deletions

diff --git a/bootstraptest/test_yjit.rb b/bootstraptest/test_yjit.rb
index a7ef90ba74..f55c319707 100644
--- a/bootstraptest/test_yjit.rb
+++ b/bootstraptest/test_yjit.rb
@@ -4244,3 +4244,10 @@ assert_equal 'true', %q{
   def entry = yield
   entry { true }
 }
+
+assert_normal_exit %q{
+  ivars = 1024.times.map { |i| "@iv_#{i} = #{i}\n" }.join
+  Foo = Class.new
+  Foo.class_eval "def initialize() #{ivars} end"
+  Foo.new
+}
diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs
index f09a07e571..7cd2449e73 100644
--- a/yjit/src/backend/arm64/mod.rs
+++ b/yjit/src/backend/arm64/mod.rs
@@ -564,6 +564,7 @@ impl Assembler
                         // If we're attempting to load into a memory operand, then
                         // we'll switch over to the store instruction.
                         (Opnd::Mem(_), _) => {
+                            let opnd0 = split_memory_address(asm, *dest);
                             let value = match *src {
                                 // If the first operand is zero, then we can just use
                                 // the zero register.
@@ -579,7 +580,6 @@ impl Assembler
                                 _ => split_bitmask_immediate(asm, *src, dest.rm_num_bits())
                             };
 
-                            let opnd0 = split_memory_address(asm, *dest);
                             asm.store(opnd0, value);
                         },
                         // If we're loading a memory operand into a register, then