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authorMaxime Chevalier-Boisvert <maxime.chevalierboisvert@shopify.com>2022-05-12 14:16:09 -0400
committerTakashi Kokubun <takashikkbn@gmail.com>2022-08-29 08:37:49 -0700
commit884cbaabd9c15cdc85809cf713c1be755ea70cf7 (patch)
treeffb1958bfcd48ca2682e211ff28f1b71fee5a104
parent92e9d1e66186d41a01f6116d1993fbfd66fdf1a6 (diff)
Change push insn macros
-rw-r--r--yjit/src/ir.rs37
1 files changed, 21 insertions, 16 deletions
diff --git a/yjit/src/ir.rs b/yjit/src/ir.rs
index 13f81f0af7..f206d5c392 100644
--- a/yjit/src/ir.rs
+++ b/yjit/src/ir.rs
@@ -399,6 +399,9 @@ impl Assembler
// Register allocation
// Generic lowering pass
// Platform-specific lowering
+
+ // Question: should this method return machine code?
+ // How do we go from lowered/optimized insn to an array of bytes?
}
}
@@ -410,18 +413,6 @@ impl Assembler
self.push_insn(Op::Add, vec![ Opnd::String(text.to_owned()) ], None);
}
- // Low-level, no output operand
- fn test(&mut self, opnd0: Opnd, opnd1: Opnd)
- {
- self.push_insn(Op::Add, vec![opnd0, opnd1], None);
- }
-
- // Low-level, no output operand
- fn mov(&mut self, opnd0: Opnd, opnd1: Opnd)
- {
- self.push_insn(Op::Add, vec![opnd0, opnd1], None);
- }
-
// Jump if not zero
fn jnz(&mut self, target: Target)
{
@@ -429,7 +420,7 @@ impl Assembler
}
}
-macro_rules! def_push_insn_2_opnd {
+macro_rules! def_push_2_opnd {
($op_name:ident, $opcode:expr) => {
impl Assembler
{
@@ -441,9 +432,23 @@ macro_rules! def_push_insn_2_opnd {
};
}
-def_push_insn_2_opnd!(add, Op::Add);
-def_push_insn_2_opnd!(sub, Op::Sub);
-def_push_insn_2_opnd!(and, Op::And);
+macro_rules! def_push_2_opnd_no_out {
+ ($op_name:ident, $opcode:expr) => {
+ impl Assembler
+ {
+ fn $op_name(&mut self, opnd0: Opnd, opnd1: Opnd)
+ {
+ self.push_insn($opcode, vec![opnd0, opnd1], None);
+ }
+ }
+ };
+}
+
+def_push_2_opnd!(add, Op::Add);
+def_push_2_opnd!(sub, Op::Sub);
+def_push_2_opnd!(and, Op::And);
+def_push_2_opnd_no_out!(test, Op::Test);
+def_push_2_opnd_no_out!(mov, Op::Mov);
// NOTE: these methods are temporary and will likely move
// to context.rs later