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authorAlan Wu <XrXr@users.noreply.github.com>2025-07-24 15:48:40 -0400
committerAlan Wu <XrXr@users.noreply.github.com>2025-07-24 17:01:27 -0400
commit271e52d55399ffaf41c59b7b477ff68d8a7e3e3b (patch)
tree558e22fc148ff6e9592c9ceba895b128d025172e
parent7e2b6291b81320a5ad6458b9bbe66595e9b06d8b (diff)
ZJIT: Re-enable some A64 assembler tests
Tweak for Condition to build when `cfg!(target = "x86_64")`.
-rw-r--r--zjit/src/asm/arm64/arg/mod.rs1
-rw-r--r--zjit/src/asm/arm64/mod.rs5
2 files changed, 2 insertions, 4 deletions
diff --git a/zjit/src/asm/arm64/arg/mod.rs b/zjit/src/asm/arm64/arg/mod.rs
index 9aff99a817..7eb37834f9 100644
--- a/zjit/src/asm/arm64/arg/mod.rs
+++ b/zjit/src/asm/arm64/arg/mod.rs
@@ -10,7 +10,6 @@ mod sys_reg;
mod truncate;
pub use bitmask_imm::BitmaskImmediate;
-#[cfg(target_arch = "aarch64")]
pub use condition::Condition;
pub use inst_offset::InstructionOffset;
pub use sf::Sf;
diff --git a/zjit/src/asm/arm64/mod.rs b/zjit/src/asm/arm64/mod.rs
index ef477821aa..d1fa3b0d9f 100644
--- a/zjit/src/asm/arm64/mod.rs
+++ b/zjit/src/asm/arm64/mod.rs
@@ -217,6 +217,7 @@ pub const fn bcond_offset_fits_bits(offset: i64) -> bool {
/// B.cond - branch to target if condition is true
pub fn bcond(cb: &mut CodeBlock, cond: u8, offset: InstructionOffset) {
+ _ = Condition;
assert!(bcond_offset_fits_bits(offset.into()), "The offset must be 19 bits or less.");
let bytes: [u8; 4] = BranchCond::bcond(cond, offset).into();
@@ -1138,14 +1139,13 @@ fn cbz_cbnz(num_bits: u8, op: bool, offset: InstructionOffset, rt: u8) -> [u8; 4
rt as u32).to_le_bytes()
}
-/*
#[cfg(test)]
mod tests {
use super::*;
/// Check that the bytes for an instruction sequence match a hex string
fn check_bytes<R>(bytes: &str, run: R) where R: FnOnce(&mut super::CodeBlock) {
- let mut cb = super::CodeBlock::new_dummy(128);
+ let mut cb = super::CodeBlock::new_dummy();
run(&mut cb);
assert_eq!(format!("{:x}", cb), bytes);
}
@@ -1676,4 +1676,3 @@ mod tests {
check_bytes("1f3c0072", |cb| tst(cb, W0, A64Opnd::new_uimm(0xffff)));
}
}
-*/