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path: root/yjit/src/backend/x86_64
AgeCommit message (Expand)Author
2022-08-29Arm64 progress (https://github.com/Shopify/ruby/pull/304)Kevin Newton
2022-08-29Delete dbg!() callsAlan Wu
2022-08-29Add jo insn and test for joMaxime Chevalier-Boisvert
2022-08-29Port guard_two_fixnumsMaxime Chevalier-Boisvert
2022-08-29Make sure allocated reg size in bits matches insn out sizeMaxime Chevalier-Boisvert
2022-08-29Fix small bug in x86_splitMaxime Chevalier-Boisvert
2022-08-29Add bitwise and to x86 backendMaxime Chevalier-Boisvert
2022-08-29Add stores to one of the testsMaxime Chevalier-Boisvert
2022-08-29Move backend tests to their own fileMaxime Chevalier-Boisvert
2022-08-29Add support for using InsnOut as memory operand baseMaxime Chevalier-Boisvert
2022-08-29Rename transform_insns to forward_passMaxime Chevalier-Boisvert
2022-08-29Add assertMaxime Chevalier-Boisvert
2022-08-29Port bitwise not, gen_check_ints()Maxime Chevalier-Boisvert
2022-08-29Add atomic counter increment instructionMaxime Chevalier-Boisvert
2022-08-29Port over putnil, putobject, and gen_leave()Maxime Chevalier-Boisvert
2022-08-29Port gen_leave_exit(), add support for labels to backendMaxime Chevalier-Boisvert
2022-08-29Add cpush and cpop IR instructionsMaxime Chevalier-Boisvert
2022-08-29Map comments in backendMaxime Chevalier-Boisvert
2022-08-29Have Assembler::compile() return a list of GC offsetsMaxime Chevalier-Boisvert
2022-08-29Remove x86_64 dependency in core.rsMaxime Chevalier-Boisvert
2022-08-29Add test for lea and ret. Fix codegen for lea and ret.Maxime Chevalier-Boisvert
2022-08-29Change codegen.rs to use backend Assembler directlyMaxime Chevalier-Boisvert
2022-08-29Implement gc offset logicMaxime Chevalier-Boisvert
2022-08-29Add CCall IR insn, implement gen_swap()Maxime Chevalier-Boisvert
2022-08-29Add test with register reuseMaxime Chevalier-Boisvert
2022-08-29Fix issue with load, gen_dupMaxime Chevalier-Boisvert
2022-08-29Implement target-specific insn splitting with Kevin. Add tests.Maxime Chevalier-Boisvert
2022-08-29Fix bug with asm.comment()Maxime Chevalier-Boisvert
2022-08-29Bias register allocator to reuse first operandMaxime Chevalier-Boisvert
2022-08-29Add dbg!() for Assembler. Fix regalloc issue.Maxime Chevalier-Boisvert
2022-08-29Function to map from Opnd => X86OpndMaxime Chevalier-Boisvert
2022-08-29Start work on platform-specific codegenMaxime Chevalier-Boisvert
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