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-rw-r--r--yjit/src/backend/x86_64/mod.rs3
1 files changed, 2 insertions, 1 deletions
diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs
index 7b84e62134..5bae5c7f29 100644
--- a/yjit/src/backend/x86_64/mod.rs
+++ b/yjit/src/backend/x86_64/mod.rs
@@ -448,7 +448,8 @@ impl Assembler
Op::CSelGE => {
mov(cb, insn.out.into(), insn.opnds[0].into());
cmovl(cb, insn.out.into(), insn.opnds[1].into());
- },
+ }
+ Op::LiveReg => (), // just a reg alloc signal, no code
// We want to keep the panic here because some instructions that
// we feed to the backend could get lowered into other