diff options
| author | Jean Boussier <jean.boussier@gmail.com> | 2025-06-03 09:26:15 +0200 |
|---|---|---|
| committer | Jean Boussier <jean.boussier@gmail.com> | 2025-06-03 21:15:41 +0200 |
| commit | e27404af9e2888bede6667e4bd0a145c4efa7c46 (patch) | |
| tree | c97c020f9f3deb5be2f8cc21a82d942affba9b4a /ruby_atomic.h | |
| parent | ea8b53a53954c2f34b1093ae2547951ae0e1fe8c (diff) | |
Use all 32bits of `shape_id_t` on all platforms
Followup: https://github.com/ruby/ruby/pull/13341 / [Feature #21353]
Even thought `shape_id_t` has been make 32bits, we were still limited
to use only the lower 16 bits because they had to fit alongside `attr_index_t`
inside a `uintptr_t` in inline caches.
By enlarging inline caches we can unlock the full 32bits on all
platforms, allowing to use these extra bits for tagging.
Notes
Notes:
Merged: https://github.com/ruby/ruby/pull/13500
Diffstat (limited to 'ruby_atomic.h')
| -rw-r--r-- | ruby_atomic.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/ruby_atomic.h b/ruby_atomic.h index 085c307ac6..5c9049e001 100644 --- a/ruby_atomic.h +++ b/ruby_atomic.h @@ -36,4 +36,36 @@ rbimpl_atomic_load_relaxed(rb_atomic_t *ptr) } #define ATOMIC_LOAD_RELAXED(var) rbimpl_atomic_load_relaxed(&(var)) +static inline uint64_t +rbimpl_atomic_u64_load_relaxed(const uint64_t *value) +{ +#if defined(HAVE_GCC_ATOMIC_BUILTINS) + return __atomic_load_n(value, __ATOMIC_RELAXED); +#elif defined(_WIN32) + uint64_t val = *value; + return InterlockedCompareExchange64(value, val, val); +#elif defined(__sun) && defined(HAVE_ATOMIC_H) && (defined(_LP64) || defined(_I32LPx)) + uint64_t val = *value; + return atomic_cas_64(value, val, val); +#else + return *value; +#endif +} +#define ATOMIC_U64_LOAD_RELAXED(var) rbimpl_atomic_u64_load_relaxed(&(var)) + +static inline void +rbimpl_atomic_u64_set_relaxed(uint64_t *address, uint64_t value) +{ +#if defined(HAVE_GCC_ATOMIC_BUILTINS) + __atomic_store_n(address, value, __ATOMIC_RELAXED); +#elif defined(_WIN32) + InterlockedExchange64(address, value); +#elif defined(__sun) && defined(HAVE_ATOMIC_H) && (defined(_LP64) || defined(_I32LPx)) + atomic_swap_64(address, value); +#else + *address = value; +#endif +} +#define ATOMIC_U64_SET_RELAXED(var, val) rbimpl_atomic_u64_set_relaxed(&(var), val) + #endif |
