diff options
| author | Takashi Kokubun <takashikkbn@gmail.com> | 2023-03-05 20:51:58 -0800 |
|---|---|---|
| committer | Takashi Kokubun <takashikkbn@gmail.com> | 2023-03-05 23:28:59 -0800 |
| commit | d51b4d4c3efe1e4f19d64173c994b535a128f42d (patch) | |
| tree | 683d1cd080398f2e54c11a69c57fdb0b9639504a /lib | |
| parent | 7573854c9f47eb71fa1ad836de2c0eba44a965c1 (diff) | |
Add Mod 10 to test r/m64, imm32
Notes
Notes:
Merged: https://github.com/ruby/ruby/pull/7448
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/ruby_vm/mjit/assembler.rb | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/lib/ruby_vm/mjit/assembler.rb b/lib/ruby_vm/mjit/assembler.rb index 2c04d1c3b3..a617d88704 100644 --- a/lib/ruby_vm/mjit/assembler.rb +++ b/lib/ruby_vm/mjit/assembler.rb @@ -821,7 +821,7 @@ module RubyVM::MJIT imm: imm8(right_imm), ) # TEST r/m64, imm32 (Mod 01: [reg]+disp8) - in [Array[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm32?(right_imm) + in [Array[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm8?(left_disp) && imm32?(right_imm) # REX.W + F7 /0 id # MI: Operand 1: ModRM:r/m (r), Operand 2: imm8/16/32 insn( @@ -831,6 +831,17 @@ module RubyVM::MJIT disp: left_disp, imm: imm32(right_imm), ) + # TEST r/m64, imm32 (Mod 10: [reg]+disp32) + in [Array[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm32?(left_disp) && imm32?(right_imm) + # REX.W + F7 /0 id + # MI: Operand 1: ModRM:r/m (r), Operand 2: imm8/16/32 + insn( + prefix: REX_W, + opcode: 0xf7, + mod_rm: ModRM[mod: Mod10, reg: 0, rm: left_reg], + disp: imm32(left_disp), + imm: imm32(right_imm), + ) # TEST r/m64, imm32 (Mod 11: reg) in [Symbol => left_reg, Integer => right_imm] if r64?(left_reg) && imm32?(right_imm) # REX.W + F7 /0 id |