diff options
| author | Takashi Kokubun <takashikkbn@gmail.com> | 2023-03-10 14:09:34 -0800 |
|---|---|---|
| committer | Takashi Kokubun <takashikkbn@gmail.com> | 2023-03-10 14:57:37 -0800 |
| commit | 93e34fe42e81d72a3e45501bf3f200ca5e78442f (patch) | |
| tree | f7f2184bb2089549730488d8b863f3d7d7043d99 /lib | |
| parent | 83f6eee76cbffbfd363e0bd9d633914e257d68e8 (diff) | |
RJIT: Write initial tests for Assembler
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/ruby_vm/rjit/assembler.rb | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/ruby_vm/rjit/assembler.rb b/lib/ruby_vm/rjit/assembler.rb index 5637083866..f4a7c235ec 100644 --- a/lib/ruby_vm/rjit/assembler.rb +++ b/lib/ruby_vm/rjit/assembler.rb @@ -157,7 +157,7 @@ module RubyVM::RJIT # D: Operand 1: Offset insn(opcode: 0xe8, imm: rel32(dst_addr)) # CALL r/m64 (Mod 11: reg) - in Symbol => dst_reg + in Symbol => dst_reg if r64?(dst_reg) # FF /2 # M: Operand 1: ModRM:r/m (r) insn( @@ -172,7 +172,7 @@ module RubyVM::RJIT def cmove(dst, src) case [dst, src] # CMOVE r64, r/m64 (Mod 11: reg) - in [Symbol => dst_reg, Symbol => src_reg] + in [Symbol => dst_reg, Symbol => src_reg] if r64?(dst_reg) && r64?(src_reg) # REX.W + 0F 44 /r # RM: Operand 1: ModRM:reg (r, w), Operand 2: ModRM:r/m (r) insn( @@ -188,7 +188,7 @@ module RubyVM::RJIT def cmovg(dst, src) case [dst, src] # CMOVG r64, r/m64 (Mod 11: reg) - in [Symbol => dst_reg, Symbol => src_reg] + in [Symbol => dst_reg, Symbol => src_reg] if r64?(dst_reg) && r64?(src_reg) # REX.W + 0F 4F /r # RM: Operand 1: ModRM:reg (r, w), Operand 2: ModRM:r/m (r) insn( @@ -204,7 +204,7 @@ module RubyVM::RJIT def cmovge(dst, src) case [dst, src] # CMOVGE r64, r/m64 (Mod 11: reg) - in [Symbol => dst_reg, Symbol => src_reg] + in [Symbol => dst_reg, Symbol => src_reg] if r64?(dst_reg) && r64?(src_reg) # REX.W + 0F 4D /r # RM: Operand 1: ModRM:reg (r, w), Operand 2: ModRM:r/m (r) insn( @@ -220,7 +220,7 @@ module RubyVM::RJIT def cmovl(dst, src) case [dst, src] # CMOVL r64, r/m64 (Mod 11: reg) - in [Symbol => dst_reg, Symbol => src_reg] + in [Symbol => dst_reg, Symbol => src_reg] if r64?(dst_reg) && r64?(src_reg) # REX.W + 0F 4C /r # RM: Operand 1: ModRM:reg (r, w), Operand 2: ModRM:r/m (r) insn( @@ -236,7 +236,7 @@ module RubyVM::RJIT def cmovle(dst, src) case [dst, src] # CMOVLE r64, r/m64 (Mod 11: reg) - in [Symbol => dst_reg, Symbol => src_reg] + in [Symbol => dst_reg, Symbol => src_reg] if r64?(dst_reg) && r64?(src_reg) # REX.W + 0F 4E /r # RM: Operand 1: ModRM:reg (r, w), Operand 2: ModRM:r/m (r) insn( @@ -431,11 +431,11 @@ module RubyVM::RJIT # E9 cd insn(opcode: 0xe9, imm: rel32(dst_addr)) # JMP r/m64 (Mod 01: [reg]+disp8) - in Array[Symbol => dst_reg, Integer => dst_disp] if imm8?(dst_disp) + in Array[Symbol => dst_reg, Integer => dst_disp] if r64?(dst_reg) && imm8?(dst_disp) # FF /4 insn(opcode: 0xff, mod_rm: ModRM[mod: Mod01, reg: 4, rm: dst_reg], disp: dst_disp) # JMP r/m64 (Mod 11: reg) - in Symbol => dst_reg + in Symbol => dst_reg if r64?(dst_reg) # FF /4 insn(opcode: 0xff, mod_rm: ModRM[mod: Mod11, reg: 4, rm: dst_reg]) else |