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Hashing and checking operands for equality is re-entrant. We could later
optimize this to check for hash/eq methods on operands and eliminate if
they don't have side effects, but this is fine for now.
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When trace_var is used, setting a global variable can cause exceptions
to be raised. We need to prepare for that.
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Also add a check in the bisect script that can assign blame to the HIR
optimizer.
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* ZJIT: Avoid splitting add_into/sub_into
* Require add_into/sub_into to take a Reg
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Rust PRs will have a failed CI step if they trigger any warnings.
This helps us stay on top of warnings from new Rust releases and
also ones we accidentally write.
Fix a typo for demo, since this only runs when Rust files are changed.
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* ZJIT: Add --zjit-exec-mem-size
* Add a comment about the limit
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Co-authored-by: Alexander Momchilov <alexander.momchilov@shopify.com>
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Co-authored-by: Stan Lo <stan001212@gmail.com>
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These `...` ISEQs have a special calling convention in the interpreter
and our stubs and JIT calling convention don't deal well. Reject for now.
Debugged with help from `@tekknolagi` and `tool/zjit_bisect.rb`.
Merely avoiding direct sends is enough to pass the attached test, but also
avoid compiling ISEQs with `...` parameter to limit exposure for now.
`SendWithoutBlock`, which does dynamic dispatch using interpreter code,
seems to handle calling into forwardable ISEQs correctly, so they are
fine -- we can't predict where these dynamic sends land anyways.
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This is moderately useful just in stdout (copy and paste into a renderer) but potentially more useful alongside a tool that parses stdout looking for `digraph G { ... }` and renders those automatically.
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* ZJIT: Remove the need for unwrap() on with_num_bits()
* Fix arm64 tests
* Track the caller of with_num_bits
Co-authored-by: Alan Wu <XrXr@users.noreply.github.com>
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Co-authored-by: Alan Wu <XrXr@users.noreply.github.com>
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Replace `rb_yarv_class_of` call with:
- a constant check for special constants (nil, fixnums, symbols, etc)
- a check for false
- direct memory read at offset 8 for regular heap objects for the class check
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ZJIT: Remove GC offsts overwritten by invalidation
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This is a counterpoint to the Immediate type and it represents all BasicObject subclasses except for the several immediate objects.
If we know something is a HeapObject, we know we can treat it as an RBasic pointer.
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ZJIT: Set PC before StringCopy
This function allocates.
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We can rewrite SendWithoutBlock to GetIvar.
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* ZJIT: Implement SingleRactorMode invalidation
* ZJIT: Add macro for compiling jumps
* ZJIT: Fix typo in comment
* YJIT: Fix typo in comment
* ZJIT: Avoid using unexported types in zjit.h
`enum ruby_vminsn_type` is declared in `insns.inc` and is not exported.
Using it in `zjit.h` would cause build errors when the file including it
doesn't include `insns.inc`.
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Previously we crashed panicked due to index bounds check running
test_fixnum.rb.
On ARM and in other places in the x86 backend, this isn't a problem
because they inspect the output of instructions which is never replaced.
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Co-authored-by: Alan Wu <alansi.xingwu@shopify.com>
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As pointed out in https://github.com/ruby/ruby/pull/14078#discussion_r2255427676, the return type should be `Float` instead.
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ZJIT: Avoid matching built-in ISEQs' HIR line numbers in tests
Co-authored-by: Author: Takashi Kokubun <takashi.kokubun@shopify.com>
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ZJIT uses the interpreter to take type profiles of what objects pass through
the code. It stores a compressed record of the history per opcode for the
opcodes we select.
Before this change, we re-used the HIR Type data-structure, a shallow type
lattice, to store historical type information. This was quick for bringup but
is quite lossy as profiles go: we get one bit per built-in type seen, and if we
see a non-built-in type in addition, we end up with BasicObject. Not very
helpful. Additionally, it does not give us any notion of cardinality: how many
of each type did we see?
This change brings with it a much more interesting slice of type history: a
histogram. A Distribution holds a record of the top-N (where N is fixed at Ruby
compile-time) `(Class, ShapeId)` pairs and their counts. It also holds an
*other* count in case we see more than N pairs.
Using this distribution, we can make more informed decisions about when we
should use type information. We can determine if we are strictly monomorphic,
very nearly monomorphic, or something else. Maybe the call-site is polymorphic,
so we should have a polymorphic inline cache. Exciting stuff.
I also plumb this new distribution into the HIR part of the compilation
pipeline.
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This allows us to annotate builtin functions with their return type.
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Co-authored-by: Takashi Kokubun <takashi.kokubun@shopify.com>
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Previously, ARM64 panicked due to compiled_side_exits() when the memory
displacement got large enough to exceed the 9 bits limit. Usually, we split
these kind of memory operands, but compiled_side_exits() runs after
split.
Using scratch registers, implement `Insn::Store` on ARM such that it can
handle large displacements without split(). Do this for x86 as well, and
remove arch specific code from compiled_side_exits(). We can now run
`TestKeywordArguments`.
Since `Insn::Store` doesn't need splitting now, users enjoy lower
register pressure.
Downside is, using `Assembler::SCRATCH_REG` as a base register is now
sometimes an error, depending on whether `Insn::Store` also needs to
use the register. It seems a fair trade off since `SCRATCH_REG` is
not often used, and we don't put it as a base register anywhere at the
moment.
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Save a couple instructions to load a small negative constant into a
register. In fact MOVN is speced to alias as `mov` in the official
disassembly.
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On the ruby side, this fixes a crash for methods with 39 or more
parameters. We used to miscomp those entry points due to Insn::Lea
picking ADDS which cannot reference SP:
# set method params: 40
mov x0, #0xfee8
movk x0, #0xffff, lsl #16
movk x0, #0xffff, lsl #32
movk x0, #0xffff, lsl #48
adds x0, xzr, x0
Have Lea work for all i32 displacements and avoid involving the split
pass. Previously, direct use of Insn::Lea directly from the user (as
opposed to generated by the split pass for some memory operations)
wasn't split, so being able to handle the whole range in arm64_emit()
was implicitly required. Also, not going through split reduces register
pressure.
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Fixes test error from running the ARM assembler on x86, but then trying
to disassemble it as x86.
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