| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-08-29 | Port over gen_putspecialobject | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Port gen_putself, log what can't be compiled in --yjit-dump-insns | Maxime Chevalier-Boisvert | |
| 2022-08-29 | TST, CMP, AND/ANDS with registers (https://github.com/Shopify/ruby/pull/301) | Kevin Newton | |
| * Add TST instruction and AND/ANDS entrypoints for immediates * TST/AND/ANDS for registers * CMP instruction | |||
| 2022-08-29 | Make sure allocated reg size in bits matches insn out size | Maxime Chevalier-Boisvert | |
| 2022-08-29 | AND/ANDS for A64 (https://github.com/Shopify/ruby/pull/300) | Kevin Newton | |
| 2022-08-29 | Add Opnd.rm_num_bits() method | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Implement X86Reg::sub_reg() method | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Fix small bug in x86_split | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Get rid of temporary context methods | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add bitwise and to x86 backend | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add stores to one of the tests | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Move backend tests to their own file | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add support for using InsnOut as memory operand base | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Rename transform_insns to forward_pass | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add assert | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Remove unused code, add backend asm test | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Port bitwise not, gen_check_ints() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Port gen_code_for_exit_from_stub() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add atomic counter increment instruction | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Get side exits working, get miniruby to boot with threshold=1 | Maxime Chevalier-Boisvert | |
| 2022-08-29 | LDADDAL, STUR, BL (https://github.com/Shopify/ruby/pull/299) | Kevin Newton | |
| * LDADDAL instruction * STUR * BL instruction * Remove num_bits from imm and uimm * Tests for imm_fits_bits and uimm_fits_bits * Reorder arguments to LDADDAL | |||
| 2022-08-29 | MOVK, MOVZ, BR (https://github.com/Shopify/ruby/pull/296) | Kevin Newton | |
| * MOVK instruction * More tests for the A64 entrypoints * Finish testing entrypoints * MOVZ * BR instruction | |||
| 2022-08-29 | Port over putnil, putobject, and gen_leave() | Maxime Chevalier-Boisvert | |
| * Remove x86-64 dependency from codegen.rs * Port over putnil and putobject * Port over gen_leave() * Complete port of gen_leave() * Fix bug in x86 instruction splitting | |||
| 2022-08-29 | Port gen_leave_exit(), add support for labels to backend | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add cpush and cpop IR instructions | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add conditional jumps | Maxime Chevalier-Boisvert | |
| 2022-08-29 | LDUR (https://github.com/Shopify/ruby/pull/295) | Kevin Newton | |
| * LDUR * Fix up immediate masking * Consume operands directly * Consistency and cleanup * More consistency and entrypoints * Cleaner syntax for masks * Cleaner shifting for encodings | |||
| 2022-08-29 | Map comments in backend | Maxime Chevalier-Boisvert | |
| 2022-08-29 | First pass at porting gen_entry_prologue() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Have Assembler::compile() return a list of GC offsets | Maxime Chevalier-Boisvert | |
| 2022-08-29 | RET A64 instructions (https://github.com/Shopify/ruby/pull/294) | Kevin Newton | |
| 2022-08-29 | Remove x86_64 dependency in core.rs | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Progress on codegen.rs port | Maxime Chevalier-Boisvert | |
| 2022-08-29 | * Arm64 Beginnings (https://github.com/Shopify/ruby/pull/291) | Maxime Chevalier-Boisvert | |
| * Initial setup for aarch64 * ADDS and SUBS * ADD and SUB for immediates * Revert moved code * Documentation * Rename Arm64* to A64* * Comments on shift types * Share sig_imm_size and unsig_imm_size | |||
| 2022-08-29 | Add test for lea and ret. Fix codegen for lea and ret. | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Change codegen.rs to use backend Assembler directly | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Implement gc offset logic | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Load GC Value operands into registers | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add CCall IR insn, implement gen_swap() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add gen_dupn | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add test with register reuse | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Fix issue with load, gen_dup | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Implement target-specific insn splitting with Kevin. Add tests. | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Make assembler methods public, sketch gen_dup with new backend | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Fix bug with asm.comment() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Bias register allocator to reuse first operand | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add dbg!() for Assembler. Fix regalloc issue. | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Function to map from Opnd => X86Opnd | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Start work on platform-specific codegen | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Split insns (https://github.com/Shopify/ruby/pull/290) | Kevin Newton | |
| * Split instructions if necessary * Add a reusable transform_insns function * Split out comments labels from transform_insns * Refactor alloc_regs to use transform_insns | |||
 |
index : ruby.git | |
| The Ruby Programming Language |
| summaryrefslogtreecommitdiff |