| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-08-29 | Add CCall IR insn, implement gen_swap() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add gen_dupn | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add test with register reuse | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Fix issue with load, gen_dup | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Implement target-specific insn splitting with Kevin. Add tests. | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Make assembler methods public, sketch gen_dup with new backend | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Fix bug with asm.comment() | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Bias register allocator to reuse first operand | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Add dbg!() for Assembler. Fix regalloc issue. | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Function to map from Opnd => X86Opnd | Maxime Chevalier-Boisvert | |
| 2022-08-29 | Start work on platform-specific codegen | Maxime Chevalier-Boisvert | |
