MicroJIT: Don't compile trace instructions

1 files changed, 19 insertions, 0 deletions

diff --git a/iseq.c b/iseq.c
index 971f1c54c7..6b8f3d0e2c 100644
--- a/iseq.c
+++ b/iseq.c
@@ -3232,6 +3232,25 @@ rb_vm_insn_addr2insn(const void *addr)
     rb_bug("rb_vm_insn_addr2insn: invalid insn address: %p", addr);
 }
 
+// Unlike rb_vm_insn_addr2insn, this function can return trace opcode variants.
+int
+rb_vm_insn_addr2opcode(const void *addr)
+{
+    st_data_t key = (st_data_t)addr;
+    st_data_t val;
+
+    if (st_lookup(rb_encoded_insn_data, key, &val)) {
+        insn_data_t *e = (insn_data_t *)val;
+        int opcode = e->insn;
+        if (addr == e->trace_encoded_insn) {
+            opcode += VM_INSTRUCTION_SIZE/2;
+        }
+        return opcode;
+    }
+
+    rb_bug("rb_vm_insn_addr2opcode: invalid insn address: %p", addr);
+}
+
 // Decode `iseq->body->iseq_encoded[i]` to an insn.
 int
 rb_vm_insn_decode(const VALUE encoded)