This reverts commit 2f151e76b5dc578026706b31f054d5caf5374b05.

The SP decrement (push) before the call do not match up with
the pops after the call, so registers were restored incorrectly.

Code from:

    ./miniruby --zjit-call-threshold=1 --zjit-dump-disasm -e 'p Time.new(1992, 9, 23, 23, 0, 0, :std)'

    str x11, [sp, #-0x10]!
    str x12, [sp, #-0x10]!
    stur x7, [sp]              # last argument
    mov x0, x20
    mov x7, x6
    mov x6, x5
    mov x5, x4
    mov x4, x3
    mov x3, x2
    mov x2, x1
    ldur x1, [x29, #-0x20]
    mov x16, #0xccfc
    movk x16, #0x2e7, lsl #16
    movk x16, #1, lsl #32
    blr x16
    ldr x12, [sp], #0x10       # supposed to match str x12, [sp, #-0x10]!, but got last argument
    ldr x11, [sp], #0x10

ZJIT: Add stack support for CCalls

This commit uses the custom instruction iterator in arm64 / x86_64
instruction splitting.  Once we introduce basic blocks to LIR, the
custom iterator will ensure that instructions are added to the correct
place.

Fix the

```
write(2, "ruby: ZJIT has panicked. More info to follow...\n", 48) = 48
write(2, "\nthread '<unnamed>' panicked at zjit/src/backend/lir.rs:160:17:\nassertion failed: num_bits <= out_num_bits\n", 107) = 107
```

based on

```
#25 0x0000aaaaaae8fb14 in zjit::backend::lir::Opnd::mem (num_bits=64, base=..., disp=0) at zjit/src/backend/lir.rs:160
#26 zjit::backend::arm64::{impl#3}::arm64_split::split_memory_address (asm=<optimized out>,
    opnd=<error reading variable: Cannot access memory at address 0x0>) at zjit/src/backend/arm64/mod.rs:260
#27 zjit::backend::arm64::{impl#3}::arm64_split::split_load_operand (asm=<optimized out>, opnd=...) at zjit/src/backend/arm64/mod.rs:273
```