ruby.git/yjit/src/backend/x86_64, branch v3_2_11

YJIT: Simplify Insn::CCall to obviate Target::FunPtr (#6793)

2022-11-23T17:14:43+00:00

Fix YJIT backend to account for unsigned int immediates (#6789)

2022-11-23T15:48:17+00:00

YJIT: x86_64: Fix cmp with number where sign bit is set

Before this commit, we were unconditionally treating unsigned ints as
signed ints when counting the number of bits required for representing
the immediate in machine code. When the size of the immediate matches
the size of the other operand, no sign extension happens, so this was
incorrect. `asm.cmp(opnd64, 0x8000_0000)` panicked even though it's
encodable as `CMP r/m32, imm32`. Large shape ids were impacted by this
issue.

Co-Authored-By: Aaron Patterson 
Co-Authored-By: Alan Wu 

Co-authored-by: Aaron Patterson 
Co-authored-by: Alan Wu

YJIT: Skip padding jumps to side exits on Arm (#6790)

2022-11-22T20:57:17+00:00

YJIT: Skip padding jumps to side exits

Co-authored-by: Maxime Chevalier-Boisvert 
Co-authored-by: Alan Wu 

Co-authored-by: Maxime Chevalier-Boisvert 
Co-authored-by: Alan Wu

YJIT: Always encode Opnd::Value in 64 bits on x86_64 for GC offsets (#6733)

2022-11-15T23:23:20+00:00

* YJIT: Always encode Opnd::Value in 64 bits on x86_64

for GC offsets

Co-authored-by: Alan Wu 

* Introduce heap_object_p

* Leave original mov intact

* Remove unneeded branches

* Add a test for movabs

Co-authored-by: Alan Wu

YJIT: Support invokeblock (#6640)

2022-11-02T16:30:48+00:00

* YJIT: Support invokeblock

* Update yjit/src/backend/arm64/mod.rs

* Update yjit/src/codegen.rs

Co-authored-by: Maxime Chevalier-Boisvert

YJIT: fold the "asm_comments" feature into "disasm" (#6591)

2022-10-19T18:03:07+00:00

Previously, enabling only "disasm" didn't actually build. Since these
two features are closely related and we don't really use one without the
other, let's simplify and merge the two features together.

YJIT: Interleave inline and outlined code blocks (#6460)

2022-10-17T17:45:59+00:00

Co-authored-by: Alan Wu 
Co-authored-by: Maxime Chevalier-Boisvert

More clippy fixes (#6547)

2022-10-14T17:04:53+00:00

YJIT: eliminate redundant mov in csel/cmov on x86 (#6348)

2022-09-09T22:41:19+00:00

* Eliminate redundant mov in csel/cmov. Translate mov reg,0 into xor

* Fix x86 asm test

* Remove dbg!()

* xor optimization unsound because it resets flags

Remove as many unnecessary moves as possible (#6342)

2022-09-08T21:09:50+00:00

This commit does a bunch of stuff to try to eliminate as many
unnecessary mov instructions as possible.

First, it introduces the Insn::LoadInto instruction. Previously
when we needed a value to go into a specific register (like in
Insn::CCall when we're putting values into the argument registers
or in Insn::CRet when we're putting a value into the return
register) we would first load the value and then mov it into the
correct register. This resulted in a lot of duplicated work with
short live ranges since they basically immediately we unnecessary.
The new instruction accepts a destination and does not interact
with the register allocator at all, making it much more efficient.

We then use the new instruction when we're loading values into
argument registers for AArch64 or X86_64, and when we're returning
a value from AArch64. Notably we don't do it when we're returning
a value from X86_64 because everything can be accomplished with a
single mov anyway.

A couple of unnecessary movs were also present because when we
called the split_load_opnd function in a lot of split passes we
were loading all registers and instruction outputs. We no longer do
that.

This commit also makes it so that UImm(0) passes through the
Insn::Store split without attempting to be loaded, which allows it
can take advantage of the zero register. So now instead of mov-ing
0 into a register and then calling store, it just stores XZR.